Trung tâm đào tạo thiết kế vi mạch Semicon


  • ĐĂNG KÝ TÀI KHOẢN ĐỂ TRUY CẬP NHIỀU TÀI LIỆU HƠN!
  • Đăng ký
    *
    *
    *
    *
    *
    Fields marked with an asterisk (*) are required.
wafer.jpg

Arrive Technologies tuyển dụng 5 Logic Design Engineer

Arrive Technologies tuyển dụng 5 Logic Design Engineer

     ARRIVE TECHNOLOGIES VIETNAM CO.,LTD

Địa chỉ: Phòng 10.1, Tầng10, Tòa Nhà E. Town, 364 Cộng Hòa, P. 13, Q. Tân Bình,Tp. Hồ Chí Minh (TPHCM)

Số điện thoại: 08 38127479
Số Fax: 08 38121484

Hạn chót: 28/06/2013

We need to recruit  five (05) more LOGIC DESIGN ENGINEERS. 

Tóm lược công ty:
Arrive Technologies Inc là cty có trụ sở đặt tại Califonia, U.S.A chuyên nghiên cứu, thiết kế và cung cấp các sản phẩm Chip tích hợp cao, đa chức năng, đa dịch vụ cho các mạng viễn thông thế hệ mới.
 
Arrive is a broadband semiconductor solutions company with a broad portfolio of highly integrated  systems-on-a-chip products combining voice, data, Internet and multimedia content for worldwide telecommunications companies.  Our ASICs and CodeChips™ provide flexible next-generation solutions allowing our customers to meet their growing broadband connection needs.
 
Arrive Technologies Viet Nam is a subsidiary of Arrive Technologies Inc., located at Etown Building (1), mainly responsible for researching and designing the Arrive’s products.
 
For the company’s expansion. We need to recruit  five (05) more LOGIC DESIGN ENGINEERS. 
 
Quy mô công ty: >100
 
Chức danh: Logic Design Engineer
 
Mục: Telecommunications/ Electric-Electronics
 
Ngôn ngữ trên hồ sơ là : English
 
Trình độ học vấn: Bachelor

Số năm kinh nghiệm: >2year
 
Lương & thưởng: Very competitive
 
Loại công việc: Full time
Tên Liên lạc: Ms Chung
Địa chỉ Email liên hệ :  Địa chỉ email này đã được bảo vệ từ spam bots, bạn cần kích hoạt Javascript để xem nó.
Website công ty: www. arrivetechnologies.com

 

Mô tả công việc: -    Define, architect & design RTL for ASIC/ FPGA/CPLD with Verilog HDL

**Working conditions:
- To work at Etown Building, PCs with strong configuration, modern lab (telecom equipments and embedded systems in MAN/WAN networks, etc...)
- Competitive salary
- Dinner & parking allowance at Etown since probation time
- Other allowances: transportation, luch, health insurance at international hospitals located in Viet Nam (such as Phap Viet, Colombia, Victoria Health Care, An Sinh,..)

 
 
 Kỹ năng/kinh nghiệm:
-Bachelor of engineering, major in TelecommunicationElectronics
- FPGA/ASIC design experience for Enterprise, Cloud, Carrier and Backhaul applications
- FPGA/ASIC design experience included Layer 2 and L3 (IPv4/IPv6) Packet Classification, Class of Service (CoS) Packet Policing, Packet Buffer Manager, Service-OAM Processing and Packet synchronization over Carrier Ethernet networks (IEEE 1588)
- Expertise in high-speed FPGA design (+50Gbps) employing data pipeline, speed/area trade-offs and parallel packet processing techniques
- Familiar with Altera and Xilinx High-Speed FPGA Families
- Familiar with Altera and Xilinx SoC FPGA Families
- Familiar with High-Speed Memory Interface DDR3/DDR4/QDRII+ Devices
- Good Knowledge of Timing Closure
-Ability to self-study & work under high-pressure
-Ability to use simulation developing software
-Advantage for whom with experience in using such tools as Altera Quartus, Xilinx ISE or Perl, System Verilog languages or such methods of verification as VMM, OVM
-Ability to read & understand telecommunication standards/ books or write reports in English

**Interest candidates please send the resume and university score transcript (if any) via email Địa chỉ email này đã được bảo vệ từ spam bots, bạn cần kích hoạt Javascript để xem nó. with subject "Logic Design Engineer" or directly to the company address: Arrive Technologies Vietnam, 10th Fl, Etown Building (1), 364 Cong Hoa, Tan Binh Dist., HCM City, Vietnam before 28 of June 2013.


Theo Arrive
 

Related Articles

Chat Zalo