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SystemC DataTypes Part II

Saturday, 06 November 2021 21:02 Semicon Editor 01

Bit Type

sc_bit is the bit type data type, which can take two values '0' and '1'. Where 1 represents true and 0 represents false.

This type is useful for modeling parts of the design where Z (hi impedance) or X (unknown) values are not needed.

There are a number of logical and comparison operators that work with sc_bit.

Operator	Description	Usage
&	Bitwise AND	expr1 & expr2
\|	Bitwise OR	expr1 \| expr2
^	Bitwise XOR	expr1 ^ expr2
~	Bitwise NOT	~expr
&=	AND assignment	&= expr
\=	OR assignment	\|= expr
^=	XOR assignment	^= expr
==	Equality	expr1 == expr2
!=	Inequality	expr1 != expr2

Example sc_bit

2

3 int sc_main (int argc, char* argv[]) {

4 // Declare the sc_bit

5 sc_bit enable;

6 sc_bit read_en;

7 // Assign value to sc_bit

8 enable = '1';

9 cout <<"Value of enable : " << enable << endl;

10 // Assign sc_bit to another sc_bit

11 read_en = enable;

12 cout <<"Value of read_en : " << read_en << endl;

13

14 return 1;

15 }

Simulator Output: sc_bit 
               SystemC 2.0.1 --- Oct  6 2006 19:17:37

Value of enable : 1

Value of read_en : 1

sc_logic

sc_bit types can hold two values so it can not be used for modelling real hardware. In real hardware we have '0', '1', 'X' and 'Z'. For this we have sc_logic type, which can hold all the 4 values.

'0': false
'1': true
'X' or 'x': unknown or indeterminate value
'Z' or 'z': high-impedance or floating value
There are a number of logical and comparison operators that work with sc_bit.

Operator	Description	Usage
&	Bitwise AND	expr1 & expr2
\|	Bitwise OR	expr1 \| expr2
^	Bitwise XOR	expr1 ^ expr2
~	Bitwise NOT	~expr
&=	AND assignment	variable &= expr
\|=	OR assignment	variable \|= expr
^=	XOR assignment	variable ^= expr
=	Equality	expr1 = expr2
!=	Inequality	expr1 != expr2

sc_logic and sc_bit type can be assigned to each other. They can used in compare operations for comparing sc_bit with sc_logic. sc_logic comes with predefined cast values for assiging values to sc_logic variables. Please look at the example for the details on usage.

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Example sc_logic

  1 #include

  3 int sc_main (int argc, char* argv[]) {

  4   // Declare the sc_logic

  5   sc_logic       read_en;

  6   sc_logic       pad;

  7   sc_logic       enable;

  8   sc_bit         no_x_z;

  9   // Assign values

 10   pad = 'z';

 11   cout <<"Value of pad     : " << pad << endl;

 12   enable = '0';

 13   cout <<"Value of enable  : " << enable << endl;

 14   read_en = ~enable;

 15   cout <<"Value of read_en : " << read_en << endl;

 16   // Logic operation

 17   if (pad == '1') {

 18     cout <<"Pad is 1"<< endl;

 19   } else {

 20     cout <<"Pad is not 1"<< endl;

 21   }

 22   // Assign to sc_bit type

 23   no_x_z = enable; // Assign 0/1 value

 24   cout <<"Value of no_x_z  : " << no_x_z  << endl;

 25   no_x_z = pad; // Assign Z

 26   cout <<"Value of no_x_z  : " << no_x_z  << endl;

 27   // Assign with cast values

 28   pad = sc_logic ('x');

 29   cout <<"Value of pad     : " << pad << endl;

 31   return 1;

 32 }
 Simulator Output: sc_logic
               SystemC 2.0.1 --- Oct  6 2006 19:17:37

Value of pad : Z

Value of enable : 0

Value of read_en : 1

Pad is not 1

Value of no_x_z : 0

Warning: (W211) sc_logic value 'Z' cannot be converted to bool

In file: sc_logic.cpp:83

Value of no_x_z : 1

Value of pad : X
Example sc_logic Compare

  1 #include

  3 int sc_main (int argc, char* argv[]) {

  4   // Declare the sc_bit

  5   sc_bit x;

  6   // Declare the sc_logic

  7   sc_logic y,z;

  8   // Asign values to x,y,x

  9   x = '1';

 10   y = '1';

 11   z = 'x';

 12   // sc_bit and sc_logic

 13   if (x == y) {

 14     cout <<"x = y " << endl;

 15   } else {

 16     x = y; // Assign sc_logic to sc_bit

 17     cout <<"x != y " << endl;

 18     cout<<"New Value of x : "<< x << endl;

 19   }

 20   // sc_logic and sc_logic

 21   if (y  ! = z) {

 22     y = z; // Assign sc_bit to sc_logic

 23     cout <<"y != z " << endl;

 24     cout<<"New Value of y : "<< y << endl;

 25   }

 26   // sc_logic and character literal

 27   if (y == 'x') {

 28     cout<<"y equal to value 'X'"<< endl;

 29   }

 31   return 1;

 32 }

Simulator Output: sc_logic_cmp
x = y

y != z

New Value of y : X

y equal to value 'x'

Logical Operation on X and Z

Logical operation on 4 states (x,z,0,1) on various types of operators has different effects. If you know Verilog then you must already know how results differ when one of the inputs is X or Z.

We shall see the effect for the following operators

& - AND Operator
| - OR Operator
~ - NOT Operator

AND Operator

For AND operator, when any of the inputs is 0, then output is 0. When both the inputs is 1 then output is 1, for other cases output is X.

& (AND)	1	X	Z
0	0	0	0
1	1	X	X
X	X	X	X
Z	X	X	X

OR Operator
For OR operator, when any of the inputs is 1, then output is 1. When both the inputs is 0 then output is 0, for other cases output is X.