Round Robin algorithm details :
Round Robin algorithm Verilog code :

What is Round Robin algorithm ?
Round-robin (RR) is one of the algorithms employed by process and network schedulers in computing.As the term is generally used, time slices (also known as time quanta) are assigned to each process in equal portions and in circular order, handling all processes without priority (also known as cyclic executive). Round-robin scheduling is simple, easy to implement, and starvation-free. Round-robin scheduling can also be applied to other scheduling problems, such as data packet scheduling in computer networks. It is an operating system concept.


Below is the diagram.



In the real situation, we can have a modified version of round robin.
Below feature can be include while designing a arbiter using round robin.

1. If there are no requests,  which ever device/master send request, access will be given in next clock cycle.
2. For some master, priority can be set. 
3. Programmable delay to get the access if request is present. 

Counter will be controlled by a state machine.




Verilog Code for Round Robin Algorithm : 



Below are the simulation results : 

In the same way, request/grant can be increased to n number

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