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IDE (ATA) Interface Bus

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   IDE / ATA Parallel Bus Description

      Nominally called the IDE (Integrated Drive Electronics) bus; how ever it's more correctly known as the ATA (Advanced Technology Attachment) specification [ATA Bus].

The IDE bus is used in Personal Computers [PCs] as a hard-drive or peripheral bus to interconnect the PC mother board and a hard drive. The IDE bus is a Parallel bus. With the introduction of the Serial ATA [SATA] specification Parallel ATA [IDE] is now being called PATA.

The IDE specification has been up-graded a number of times each one building on the past specification. ATA-1 and 2 were single documents, however after ATA-2 the specification was divided into a number of different documents. Most maintain backward compatibility, keeping in mind the cable changed. Each new version of the standard saw an increase in bus speed. The data transfer rate is shown after each version listed below. The current maximum IDE bus speed is 133MBytes/sec [133MBps].

Data is passed Single-Ended,via data line and ground. Only the 40 pin connector pin out are referenced below, which are used on 3.5-inch drives, but there is also a 50 pin connector used on 2.5-inch drives. The 50 pin connector adds the power and Master/Slave functions. PCMCIA uses a 68 pin connector. A graph showing the difference between ATA and Ultra ATA timing is shown on the below. The standard defines a single Host or adaptor which connects to one [device 0] or two [device 1] devices in a daisy chained configuration. The IDE, ATA connector pin out is listed in the table below. Note; there is text to decode the 80 pin cable onto the 40-pin connector.. There are a number of versions of the ATA bus, with each of the different versions listed below. The Serial ATA: which replaced the ATA bus is listed on its own page. Details for each bus version are listed below. A graphic which provides a comparison of all the different IDE interfaces listed here is provided on the Hard Drive Interface Speeds page.

ATA-1 (IDE), [Obsolete] 8.3MBytes/sec, 8 or 16 bit data width, 40 pin data ribbon cable/connector. With a maximum of 2 devices on the bus. Using PIO Modes 0, 1 or 2. Performed no bus error correction. The ATA-1 specification was released in 1994, and was withdrawn in 1999.

ATA-2 (EIDE, or Fast ATA), [Obsolete] 16.6MBytes/sec, 8 or 16 bit data width, 40 pin data ribbon cable/connector. With a maximum of 4 devices on the bus. Using PIO Modes 0, 1, 2, 3, or 4. The ATA-2 specification was released in 1995 and was withdrawn in 2001.

ATA-3, 16MBytes/sec, 16 bit data width, 40 pin data ribbon cable/connector. Using PIO Modes 0, 1, 2, 3, or 4 and Multiword DMA modes 1 and 2. Runs with 120nS Strobes (rising edge to rising edge). Includes CRC.
ATAPI (ATA Packet Interface)is the CD-ROM side of the interface. It uses the same connector as ATA, and adds 1 for analog and 1 for digital audio. The ATA-3 specification was released in 1997 and was withdrawn in 2002.

ATA-4 Ultra-ATA/33, 33MBytes/sec, 16 bit data width, 40 pin data ribbon cable/connector. Using PIO Modes 0, 1, 2, 3, or 4 and Multiword DMA modes 1 and 2 and Ultra DMA modes 0, 1, and 2. Runs with 120nS Strobes (rising edge to rising edge), but used both edges of the Strobe producing an effective 60nS Strobe rate. 33MBps Transfer speed = [(1/120nS) x 2 bytes x 2]. Where 120nS cycle time is 4 clock periods at 30nS each. Added CRC checking. The ATA-4 standard was released in 1998.

ATA-5 Ultra-ATA/66, 66MBytes/sec, 16 bit data width 40 pin data connector/80 pin cable, with the additional 40 new pins being Ground. The new cable allows ATA/66 to run at a faster rate then ATA/33. Using PIO Modes 0, 1, 2, 3, or 4 and Multiword DMA modes 1 and 2 and Ultra DMA modes 0, 1, 2, 3 and 4. Runs with 60nS Strobes (rising edge to rising edge), but uses both edges of the Strobe producing an effective 30nS Strobe rate. 66MBps Transfer speed = [(1/60nS) x 2 bytes x 2]. Where 60nS cycle time is 2 clock periods at 30nS each. The ATA-5 standard was released in 2000.

ATA-6 Ultra-ATA/100, 100MBytes/sec,16 bit data width 40 pin data connector/80 pin cable, with the additional 40 new pins being Ground. Using PIO Modes 0, 1, 2, 3, or 4 and Multiword DMA modes 1 and 2 and Ultra DMA modes 0, 1, 2, 3, 4 and 5. 100MBps Transfer speed = [(1/40nS) x 2 bytes x 2]. Where 40nS cycle time is 2 clock periods at 20nS each. The ATA-6 standard was released in 2002.

ATA-7 Ultra-ATA/133, 133MBytes/sec,16 bit data width 40 pin data connector/80 pin cable, with the additional 40 new pins being Ground. Using PIO Modes 0, 1, 2, 3, or 4 and Multiword DMA modes 0, 1 and 2 and Ultra DMA modes 0, 1, 2, 3, 4, 5 and 6. 133MBps Transfer speed = [(1/30nS) x 2 bytes x 2]. Where 30nS cycle time is 2 clock periods at 15nS each. The ATA-7 standard was released in 2005. With the introduction of Serial ATA, this is the last expected update of the IDE [PATA] bus. SATA: is faster, and requires a smaller cable, which means better air flow in the Chassis.

Serial ATA: (Ver 1.0) High Speed Serialized AT Attachment
Serial version of the IDE [ATA] spec. Uses a 4 conductor cable with two differential pairs [Tx/Rx], plus an additional three grounds pins and a separate power pin. Data runs at 150MBps [1.5GHz] using 8B/10B encoding and 250mV signal swings. Serial ATA is not compatible with the IDE [Parallel ATA] because the connectors are different, the voltage levels are different, and data format is different [SATA sends a bit at a time while PATA sends 16 bits at once]. SATA will not interface with the IDE bus. No cable can be made to connect SATA with IDE. However a converter may be purchased which translates SATA to PATA. One module appears as a 2" x 2" board, for $50 and converts IDE controllers 66/100/133/150 MB/s to Serial ATA 150.

ATA-# interface for disk drives; defines the Physical layer, Electrical layer and Signaling protocol. The speed of data transfer depends on the Transfer mode used. There are 3 main Transfer modes: PIO, Multiword DMA, and Ultra DMA. All transfer rates listed above are best case [Mulit-word/DMA transfers].

PIO Modes: 0 [3.3MB/s], 1 [5.2MB/s], 2 [8.3MB/s], 3 [11.1MB/s], 4 [16.7MB/s]
Multiword DMA Modes: 0 [4.2MB/s], 1 [13.3MB/s], 2 [16.7MB/s]
Ultra DMA Modes: 0 [16.7MB/s], 1 [25.0MB/s], 2 [33.3MB/s], 3 [44.4MB/s], 4 [66.7MB/s], 5 [100.0MB/s]

The hard drive, computer, and software determine the mode used: Programmed Input/Output (PIO), Direct Memory Access (DMA). Addressing on the bus is defined by; CHS (Cylinder, Head, Sector)

Power (+5 / +12volts) is supplied over a four pin connector (unless the 50-pin connector is used). There are a number of power (down) modes defined: Active, Idle, Standby, and Sleep.
Active: normal drive operation.
Idle: the electronics power down but still receives commands.
Standby: the drive spins down and the electronics power down.
Sleep: every thing is powered down, the electronics will not respond except for a power reset.

The early specifications defined the data cable as a normal 40 pin ribbon cable with a 40 pin IDC connector. The latest standard(s) define the same 40 pin connector, but have increased the ribbon to 80 pins - the additional 40 pins being dedicated to ground pins. Data transfers are made at either 8 or 16 bits.
The normal PC cables have three connectors, one for the mother board (at one end) and two for device attachment. One at the opposite end, the other about 6 inches away.

 

Ultra ATA doubles the data transfer rate (over Fast ATA) by using the both edges of the strobe

Ultra-ATA/Fast-ATA Strobe 
Lần cập nhật cuối ( Thứ sáu, 31 Tháng 5 2013 16:00 )  
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